1. Field of the Invention
The present invention relates to a stud bump structure and a method for manufacturing the same, and in particular, relates to a silver alloy stud bump structure and a method for manufacturing the same.
2. Description of the Related Art
Interconnection methods for integrated circuit chips include wire bonding, tape automated bonding, flip chip bonding, or the like. In a tape automated bonding device or a flip chip bonding devices, a conductive stud bump is used as a connection point between a chip and a substrate. These techniques are all high density packaging techniques.
Advantages of flip chip bonding may include having great amounts of connection points, small distances between each connection point, small package areas, good performance at a high frequency, high reliability, and good resistance to electromagnetic interference. Therefore, flip chip bonding has been commonly used in packaging processes for an electric device such as an integrated circuit (IC) or a light emitting diode (LED).
Manufacturing and packaging a bump play an important role in a flip chip bonding process. Most of the flip chip bumps are made of solder alloys, such as Sn-37Pb, Sn-9Zn, Sn-0.7Cu, Sn-3.5Ag, Sn-51In, Sn-58Bi, Sn-3-Ag-0.5Cu, Sn-9Zn-3Bi, or the like.
Methods for manufacturing a solder bump may include electroplating and stencil printing. However, a solder bump manufactured by electroplating is usually harmful for the environment and its specific alloy composition is usually difficult to control. In addition, it is also difficult to find an appropriate plating solution and plating process to form a Pb-free solder bump therein. For example, if a bump is formed of an alloy such as Sn-3.5Ag, Sn-0.7Cu, or Ag-0.5Cu, the composition of the alloy is usually hard to control. If a bump is formed of an alloy such as Sn-51In, Sn-58Bi, or Sn-9Zn—Bi, it is usually very difficult to find an appropriate plating solution.
Therefore, nowadays, stencil printing of a solder paste has become an essential method in a flip chip packaging process. A key material for a flip chip solder paste is tin powders. Generally, a particle size of a tin powder in a surface mount technology (SMT) is between about 30 μm and 50 μm, wherein the tin powder of this size is easier to be manufactured. However, since a size of a flip chip bump is usually smaller than 120 μm, the size of the tin powder is required to be smaller than 10 μm and the tin powder with this small size is very difficult to be manufactured. In addition, when the size of the flip chip bump is decreased to be smaller than 100 μm, or even about 50 μm, each bump may only contain a few tin powders even if the size of the tin powder is smaller than 10 μm. Therefore, the difficulty of coplanarity tends to occur after a reflow process. Other problems of manufacturing a flip chip bump by solder paste include holes being formed by flux after a reflow process and manufacturing failures of the stencil printing may increase when a distance between each connection point is less than 100 μm.
In electronic packaging industry, electroplating gold and copper bumps are also used for flip chip assembly. However, the electroplating process for gold and copper bumps has also concern of environmental pollution. In addition, the intermetallic compounds grow rapidly at the interface between gold bump and aluminum pad, which are often accompanied with the occurrence of Kirkendall voids. Both the effects of intermetallic compounds and Kirkendall voids can cause the embrittlement and electrical resistance increase of connection point. In contrast, the intermetallic compounds formed at the copper bump/aluminum pad interface are very thin, leading to an insufficient bonding. An alternative bumping method, using gold or copper wires to produce gold or copper stud bumps, has similar disadvantages of excessive intermetallics growth for gold stud bump and insufficient intermetallics formation for copper stud bump. The rigidity of copper stud bump can additionally cause the cracking of under-pad chip.
Tape automated bonding (TAB) is another technique used in a high density packaging process. Advantages of the TAB package may include having a great amount of connection points, high strength of connection points, and good electrical and thermal conductivity. In addition, the tape automated bonding may be performed automatically and can be tested during packing process. Furthermore, the thickness of a resulting package may be minimized. In a TAB process, gold and copper bumps are conventionally employed, which are also manufactured by electroplating or stud bumping method as in a flip chip process. However, either electroplating gold bump or gold stud bump is expensive due to the material cost and the problems of excessive intermetallic compounds and Kirkendall voids similarly occur in a TAB process as in a flip chip assembly. On the other hand, either electroplating copper bump or copper stud bump in TAB package has the disadvantages of insufficient intermetallics growth and severe oxidation. The failure of under-pad chip cracking due to the rigidity of copper can also be caused during the copper stud bumping process.